Following the tag encoding is a 1\dash byte value that determines
whether a debugging information entry using this abbreviation
-has child entries or not. If the value is DW\-\_CHILDREN\-\_yes,
+has child entries or not. If the value is
+\livetarg{chap:DWCHILDRENyes}{DW\-\_CHILDREN\-\_yes},
the next physically succeeding entry of any debugging
information entry using this abbreviation is the first
child of that entry. If the 1\dash byte value following the
-abbreviation’s tag encoding is DW\-\_CHILDREN\-\_no, the next
+abbreviation’s tag encoding is
+\livetarg{chap:DWCHILDRENno}{DW\-\_CHILDREN\-\_no}, the next
physically succeeding entry of any debugging information entry
using this abbreviation is a sibling of that entry. (Either
the first child or sibling entries may be null entries). The
\label{tab:childdeterminationencodings}
\begin{tabular}{l|l} \hline
Child determination name& Value\\ \hline
-DW\-\_CHILDREN\-\_no&0x00 \\
-DW\-\_CHILDREN\-\_yes&0x01 \\ \hline
+\livelink{chap:DWCHILDRENno}{DW\-\_CHILDREN\-\_no}&0x00 \\
+\livelink{chap:DWCHILDRENyes}{DW\-\_CHILDREN\-\_yes}&0x01 \\ \hline
\end{tabular}
\end{figure}
\hline
\endlastfoot
-DW\-\_CC\-\_normal&0x01 \\
-DW\-\_CC\-\_program&0x02 \\
-DW\-\_CC\-\_nocall&0x03 \\
-DW\-\_CC\-\_lo\-\_user&0x40 \\
-DW\-\_CC\-\_hi\-\_user&0xff \\
+\livelink{chap:DWCCnormal}{DW\-\_CC\-\_normal}&0x01 \\
+\livelink{chap:DWCCprogram}{DW\-\_CC\-\_program}&0x02 \\
+\livelink{chap:DWCCnocall}{DW\-\_CC\-\_nocall}&0x03 \\
+\livetarg{chap:DWCClouser}{DW\-\_CC\-\_lo\-\_user}&0x40 \\
+\livetarg{chap:DWCChiuser}{DW\-\_CC\-\_hi\-\_user}&0xff \\
\end{longtable}
\end{centering}
\hline
\endlastfoot
-DW\-\_CFA\-\_advance\-\_loc&0x1&delta & \\
-DW\-\_CFA\-\_offset&0x2®ister&ULEB128 offset \\
-DW\-\_CFA\-\_restore&0x3®ister & & \\
-DW\-\_CFA\-\_nop&0&0 & & \\
-DW\-\_CFA\-\_set\-\_loc&0&0x01&address & \\
-DW\-\_CFA\-\_advance\-\_loc1&0&0x02&1\dash byte delta & \\
-DW\-\_CFA\-\_advance\-\_loc2&0&0x03&2\dash byte delta & \\
-DW\-\_CFA\-\_advance\-\_loc4&0&0x04&4\dash byte delta & \\
-DW\-\_CFA\-\_offset\-\_extended&0&0x05&ULEB128 register&ULEB128 offset \\
-DW\-\_CFA\-\_restore\-\_extended&0&0x06&ULEB128 register & \\
-DW\-\_CFA\-\_undefined&0&0x07&ULEB128 register & \\
-DW\-\_CFA\-\_same\-\_value&0&0x08 &ULEB128 register & \\
-DW\-\_CFA\-\_register&0&0x09&ULEB128 register &ULEB128 offset \\
-DW\-\_CFA\-\_remember\-\_state&0&0x0a & & \\
-DW\-\_CFA\-\_restore\-\_state&0&0x0b & & \\
-DW\-\_CFA\-\_def\-\_cfa&0&0x0c &ULEB128 register&ULEB128 offset \\
-DW\-\_CFA\-\_def\-\_cfa\-\_register&0&0x0d&ULEB128 register & \\
-DW\-\_CFA\-\_def\-\_cfa\-\_offset&0&0x0e &ULEB128 offset & \\
-DW\-\_CFA\-\_def\-\_cfa\-\_expression&0&0x0f &BLOCK \\
-DW\-\_CFA\-\_expression&0&0x10&ULEB128 register & BLOCK \\
-
-DW\-\_CFA\-\_offset\-\_extended\-\_sf&0&0x11&ULEB128 register&SLEB128 offset \\
-DW\-\_CFA\-\_def\-\_cfa\-\_sf&0&0x12&ULEB128 register&SLEB128 offset \\
-DW\-\_CFA\-\_def\-\_cfa\-\_offset\-\_sf&0&0x13&SLEB128 offset & \\
-DW\-\_CFA\-\_val\-\_offset&0&0x14&ULEB128&ULEB128 \\
-DW\-\_CFA\-\_val\-\_offset\-\_sf&0&0x15&ULEB128&SLEB128 \\
-DW\-\_CFA\-\_val\-\_expression&0&0x16&ULEB128&BLOCK \\
-DW\-\_CFA\-\_lo\-\_user&0&0x1c & & \\
-DW\-\_CFA\-\_hi\-\_user&0&0x3f & & \\
+\livelink{chap:DWCFAadvanceloc}{DW\-\_CFA\-\_advance\-\_loc}&0x1&delta & \\
+\livelink{chap:DWCFAoffset}{DW\-\_CFA\-\_offset}&0x2®ister&ULEB128 offset \\
+\livelink{chap:DWCFArestore}{DW\-\_CFA\-\_restore}&0x3®ister & & \\
+\livelink{chap:DWCFAnop}{DW\-\_CFA\-\_nop}&0&0 & & \\
+\livelink{chap:DWCFAsetloc}{DW\-\_CFA\-\_set\-\_loc}&0&0x01&address & \\
+\livelink{chap:DWCFAadvanceloc1}{DW\-\_CFA\-\_advance\-\_loc1}&0&0x02&1\dash byte delta & \\
+\livelink{chap:DWCFAadvanceloc2}{DW\-\_CFA\-\_advance\-\_loc2}&0&0x03&2\dash byte delta & \\
+\livelink{chap:DWCFAadvanceloc4}{DW\-\_CFA\-\_advance\-\_loc4}&0&0x04&4\dash byte delta & \\
+\livelink{chap:DWCFAoffsetextended}{DW\-\_CFA\-\_offset\-\_extended}&0&0x05&ULEB128 register&ULEB128 offset \\
+\livelink{chap:DWCFArestoreextended}{DW\-\_CFA\-\_restore\-\_extended}&0&0x06&ULEB128 register & \\
+\livelink{chap:DWCFAundefined}{DW\-\_CFA\-\_undefined}&0&0x07&ULEB128 register & \\
+\livelink{chap:DWCFAsamevalue}{DW\-\_CFA\-\_same\-\_value}&0&0x08 &ULEB128 register & \\
+\livelink{chap:DWCFAregister}{DW\-\_CFA\-\_register}&0&0x09&ULEB128 register &ULEB128 offset \\
+\livelink{chap:DWCFArememberstate}{DW\-\_CFA\-\_remember\-\_state}&0&0x0a & & \\
+\livelink{chap:DWCFArestorestate}{DW\-\_CFA\-\_restore\-\_state}&0&0x0b & & \\
+\livelink{chap:DWCFAdefcfa}{DW\-\_CFA\-\_def\-\_cfa}&0&0x0c &ULEB128 register&ULEB128 offset \\
+\livelink{chap:DWCFAdefcfaregister}{DW\-\_CFA\-\_def\-\_cfa\-\_register}&0&0x0d&ULEB128 register & \\
+\livelink{chap:DWCFAdefcfaoffset}{DW\-\_CFA\-\_def\-\_cfa\-\_offset}&0&0x0e &ULEB128 offset & \\
+\livelink{chap:DWCFAdefcfaexpression}{DW\-\_CFA\-\_def\-\_cfa\-\_expression}&0&0x0f &BLOCK \\
+\livelink{chap:DWCFAexpression}{DW\-\_CFA\-\_expression}&0&0x10&ULEB128 register & BLOCK \\
+
+\livelink{chap:DWCFAoffsetextendedsf}{DW\-\_CFA\-\_offset\-\_extended\-\_sf}&0&0x11&ULEB128 register&SLEB128 offset \\
+\livelink{chap:DWCFAdefcfasf}{DW\-\_CFA\-\_def\-\_cfa\-\_sf}&0&0x12&ULEB128 register&SLEB128 offset \\
+\livelink{chap:DWCFAdefcfaoffsetsf}{DW\-\_CFA\-\_def\-\_cfa\-\_offset\-\_sf}&0&0x13&SLEB128 offset & \\
+\livelink{chap:DWCFAvaloffset}{DW\-\_CFA\-\_val\-\_offset}&0&0x14&ULEB128&ULEB128 \\
+\livelink{chap:DWCFAvaloffsetsf}{DW\-\_CFA\-\_val\-\_offset\-\_sf}&0&0x15&ULEB128&SLEB128 \\
+\livelink{chap:DWCFAvalexpression}{DW\-\_CFA\-\_val\-\_expression}&0&0x16&ULEB128&BLOCK \\
+\livetarg{chap:DWCFAlouser}{DW\-\_CFA\-\_lo\-\_user}&0&0x1c & & \\
+\livetarg{chap:DWCFAhiuser}{DW\-\_CFA\-\_hi\-\_user}&0&0x3f & & \\
\end{longtable}
\end{centering}
\scriptsize
\begin{alltt}
\livelink{chap:DWTAGcompileunit}{DW\-\_TAG\-\_compile\-\_unit}
-DW\-\_CHILDREN\-\_yes
+\livelink{chap:DWCHILDRENyes}{DW\-\_CHILDREN\-\_yes}
\livelink{chap:DWATname}{DW\-\_AT\-\_name} \livelink{chap:DWFORMstring}{DW\-\_FORM\-\_string}
\livelink{chap:DWATproducer}{DW\-\_AT\-\_producer} \livelink{chap:DWFORMstring}{DW\-\_FORM\-\_string}
\livelink{chap:DWATcompdir}{DW\-\_AT\-\_comp\-\_dir} \livelink{chap:DWFORMstring}{DW\-\_FORM\-\_string}
\hrule
2
\livelink{chap:DWTAGbasetype}{DW\-\_TAG\-\_base\-\_type}
-DW\-\_CHILDREN\-\_no
+\livelink{chap:DWCHILDRENno}{DW\-\_CHILDREN\-\_no}
\livelink{chap:DWATname}{DW\-\_AT\-\_name} \livelink{chap:DWFORMstring}{DW\-\_FORM\-\_string}
\livelink{chap:DWATencoding}{DW\-\_AT\-\_encoding} \livelink{chap:DWFORMdata1}{DW\-\_FORM\-\_data1}
\livelink{chap:DWATbytesize}{DW\-\_AT\-\_byte\-\_size} \livelink{chap:DWFORMdata1}{DW\-\_FORM\-\_data1}
\hrule
3
\livelink{chap:DWTAGpointertype}{DW\-\_TAG\-\_pointer\-\_type}
-DW\-\_CHILDREN\-\_no
+\livelink{chap:DWCHILDRENno}{DW\-\_CHILDREN\-\_no}
\livelink{chap:DWATtype}{DW\-\_AT\-\_type} \livelink{chap:DWFORMref4}{DW\-\_FORM\-\_ref4}
0
\vspace{0.01cm}
\hrule
4
\livelink{chap:DWTAGtypedef}{DW\-\_TAG\-\_typedef}
-DW\-\_CHILDREN\-\_no
+\livelink{chap:DWCHILDRENno}{DW\-\_CHILDREN\-\_no}
\livelink{chap:DWATname}{DW\-\_AT\-\_name} \livelink{chap:DWFORMstring}{DW\-\_FORM\-\_string}
\livelink{chap:DWATtype}{DW\-\_AT\-\_type} \livelink{chap:DWFORMrefaddr}{DW\-\_FORM\-\_ref\-\_addr}
0
cie+12&4&code\_alignment\_factor, \textless caf \textgreater \\
cie+13&-4&data\_alignment\_factor, \textless daf \textgreater \\
cie+14&8&R8 is the return addr. \\
-cie+15&DW\-\_CFA\-\_def\-\_cfa (7, 0)&CFA = [R7]+0 \\
-cie+18&DW\-\_CFA\-\_same\-\_value (0)&R0 not modified (=0) \\
-cie+20&DW\-\_CFA\-\_undefined (1)&R1 scratch \\
-cie+22&DW\-\_CFA\-\_undefined (2)&R2 scratch \\
-cie+24&DW\-\_CFA\-\_undefined (3)&R3 scratch \\
-cie+26&DW\-\_CFA\-\_same\-\_value (4)&R4 preserve \\
-cie+28&DW\-\_CFA\-\_same\-\_value (5)&R5 preserve \\
-cie+30&DW\-\_CFA\-\_same\-\_value (6)&R6 preserve \\
-cie+32&DW\-\_CFA\-\_same\-\_value (7)&R7 preserve \\
-cie+34&DW\-\_CFA\-\_register (8, 1)&R8 is in R1 \\
-cie+37&DW\-\_CFA\-\_nop&padding \\
-cie+38&DW\-\_CFA\-\_nop& padding \\
-cie+39& DW\-\_CFA\-\_nop&padding \\
+cie+15&\livelink{chap:DWCFAdefcfa}{DW\-\_CFA\-\_def\-\_cfa} (7, 0)&CFA = [R7]+0 \\
+cie+18&\livelink{chap:DWCFAsamevalue}{DW\-\_CFA\-\_same\-\_value} (0)&R0 not modified (=0) \\
+cie+20&\livelink{chap:DWCFAundefined}{DW\-\_CFA\-\_undefined} (1)&R1 scratch \\
+cie+22&\livelink{chap:DWCFAundefined}{DW\-\_CFA\-\_undefined} (2)&R2 scratch \\
+cie+24&\livelink{chap:DWCFAundefined}{DW\-\_CFA\-\_undefined} (3)&R3 scratch \\
+cie+26&\livelink{chap:DWCFAsamevalue}{DW\-\_CFA\-\_same\-\_value} (4)&R4 preserve \\
+cie+28&\livelink{chap:DWCFAsamevalue}{DW\-\_CFA\-\_same\-\_value} (5)&R5 preserve \\
+cie+30&\livelink{chap:DWCFAsamevalue}{DW\-\_CFA\-\_same\-\_value} (6)&R6 preserve \\
+cie+32&\livelink{chap:DWCFAsamevalue}{DW\-\_CFA\-\_same\-\_value} (7)&R7 preserve \\
+cie+34&\livelink{chap:DWCFAregister}{DW\-\_CFA\-\_register} (8, 1)&R8 is in R1 \\
+cie+37&\livelink{chap:DWCFAnop}{DW\-\_CFA\-\_nop}&padding \\
+cie+38&\livelink{chap:DWCFAnop}{DW\-\_CFA\-\_nop}& padding \\
+cie+39& \livelink{chap:DWCFAnop}{DW\-\_CFA\-\_nop}&padding \\
cie+40 && \\
\end{longtable}
\end{centering}
fde+4&cie&CIE\_ptr \\
fde+8&foo&initial\_location \\
fde+12&84&address\_range \\
-fde+16&DW\-\_CFA\-\_advance\-\_loc(1)&instructions \\
-fde+17&DW\-\_CFA\-\_def\-\_cfa\-\_offset(12)& \textless fs \textgreater \\
-fde+19&DW\-\_CFA\-\_advance\-\_loc(1)&4/ \textless caf \textgreater \\
-fde+20&DW\-\_CFA\-\_offset(8,1)&-4/ \textless daf \textgreater (second parameter) \\
-fde+22&DW\-\_CFA\-\_advance\-\_loc(1)& \\
-fde+23&DW\-\_CFA\-\_offset(6,2)&-8/ \textless daf> \textgreater (2nd parameter) \\
-fde+25&DW\-\_CFA\-\_advance\-\_loc(1) & \\
-fde+26&DW\-\_CFA\-\_def\-\_cfa\-\_register(6) & \\
-fde+28&DW\-\_CFA\-\_advance\-\_loc(1) & \\
-fde+29&DW\-\_CFA\-\_offset(4,3)&-12/ \textless daf \textgreater (2nd parameter) \\
-fde+31&DW\-\_CFA\-\_advance\-\_loc(12)&44/ \textless caf \textgreater \\
-fde+32&DW\-\_CFA\-\_restore(4)& \\
-fde+33&DW\-\_CFA\-\_advance\-\_loc(1) & \\
-fde+34&DW\-\_CFA\-\_restore(6) & \\
-fde+35&DW\-\_CFA\-\_def\-\_cfa\-\_register(7) & \\
-fde+37&DW\-\_CFA\-\_advance\-\_loc(1) & \\
-fde+38&DW\-\_CFA\-\_restore(8) &\\
-fde+39&DW\-\_CFA\-\_advance\-\_loc(1) &\\
-fde+40&DW\-\_CFA\-\_def\-\_cfa\-\_offset(0) &\\
-fde+42&DW\-\_CFA\-\_nop&padding \\
-fde+43&DW\-\_CFA\-\_nop&padding \\
+fde+16&\livelink{chap:DWCFAadvanceloc}{DW\-\_CFA\-\_advance\-\_loc}(1)&instructions \\
+fde+17&\livelink{chap:DWCFAdefcfaoffset}{DW\-\_CFA\-\_def\-\_cfa\-\_offset}(12)& \textless fs \textgreater \\
+fde+19&\livelink{chap:DWCFAadvanceloc}{DW\-\_CFA\-\_advance\-\_loc}(1)&4/ \textless caf \textgreater \\
+fde+20&\livelink{chap:DWCFAoffset}{DW\-\_CFA\-\_offset}(8,1)&-4/ \textless daf \textgreater (second parameter) \\
+fde+22&\livelink{chap:DWCFAadvanceloc}{DW\-\_CFA\-\_advance\-\_loc}(1)& \\
+fde+23&\livelink{chap:DWCFAoffset}{DW\-\_CFA\-\_offset}(6,2)&-8/ \textless daf> \textgreater (2nd parameter) \\
+fde+25&\livelink{chap:DWCFAadvanceloc}{DW\-\_CFA\-\_advance\-\_loc}(1) & \\
+fde+26&\livelink{chap:DWCFAdefcfaregister}{DW\-\_CFA\-\_def\-\_cfa\-\_register}(6) & \\
+fde+28&\livelink{chap:DWCFAadvanceloc}{DW\-\_CFA\-\_advance\-\_loc}(1) & \\
+fde+29&\livelink{chap:DWCFAoffset}{DW\-\_CFA\-\_offset}(4,3)&-12/ \textless daf \textgreater (2nd parameter) \\
+fde+31&\livelink{chap:DWCFAadvanceloc}{DW\-\_CFA\-\_advance\-\_loc}(12)&44/ \textless caf \textgreater \\
+fde+32&\livelink{chap:DWCFArestore}{DW\-\_CFA\-\_restore}(4)& \\
+fde+33&\livelink{chap:DWCFAadvanceloc}{DW\-\_CFA\-\_advance\-\_loc}(1) & \\
+fde+34&\livelink{chap:DWCFArestore}{DW\-\_CFA\-\_restore}(6) & \\
+fde+35&\livelink{chap:DWCFAdefcfaregister}{DW\-\_CFA\-\_def\-\_cfa\-\_register}(7) & \\
+fde+37&\livelink{chap:DWCFAadvanceloc}{DW\-\_CFA\-\_advance\-\_loc}(1) & \\
+fde+38&\livelink{chap:DWCFArestore}{DW\-\_CFA\-\_restore}(8) &\\
+fde+39&\livelink{chap:DWCFAadvanceloc}{DW\-\_CFA\-\_advance\-\_loc}(1) &\\
+fde+40&\livelink{chap:DWCFAdefcfaoffset}{DW\-\_CFA\-\_def\-\_cfa\-\_offset}(0) &\\
+fde+42&\livelink{chap:DWCFAnop}{DW\-\_CFA\-\_nop}&padding \\
+fde+43&\livelink{chap:DWCFAnop}{DW\-\_CFA\-\_nop}&padding \\
fde+44 && \\
\end{longtable}
\end{centering}
default value for any or all columns.
\item padding (array of ubyte) \\
-Enough DW\-\_CFA\-\_nop instructions to make the size of this entry
+Enough \livelink{chap:DWCFAnop}{DW\-\_CFA\-\_nop} instructions to make the size of this entry
match the length value above.
\end{enumerate}
A sequence of table defining instructions that are described below.
\item 6. padding (array of ubyte) \\
-Enough DW\-\_CFA\-\_nop instructions to make the size of this
+Enough \livelink{chap:DWCFAnop}{DW\-\_CFA\-\_nop} instructions to make the size of this
entry match the length value above.
\end{enumerate}
\end{itemize}
\textit{Call frame instructions to which these restrictions apply
-include DW\-\_CFA\-\_def\-\_cfa\-\_expression, DW\-\_CFA\-\_expression
-and DW\-\_CFA\-\_val\-\_expression.}
+include \livelink{chap:DWCFAdefcfaexpression}{DW\-\_CFA\-\_def\-\_cfa\-\_expression}, \livelink{chap:DWCFAexpression}{DW\-\_CFA\-\_expression}
+and \livelink{chap:DWCFAvalexpression}{DW\-\_CFA\-\_val\-\_expression}.}
\subsubsection{Row Creation Instructions}
\label{chap:rowcreationinstructions}
\begin{enumerate}[1.]
\item \textbf{DW\-\_CFA\-\_set\-\_loc} \\
-The DW\-\_CFA\-\_set\-\_loc instruction takes a single operand that
+The \livetarg{chap:DWCFAsetloc}{DW\-\_CFA\-\_set\-\_loc} instruction takes a single operand that
represents a target address. The required action is to create a
new table row using the specified address as the location. All
other values in the new row are initially identical to the
\item \textbf{DW\-\_CFA\-\_advance\-\_loc} \\
-The DW\-\_CFA\-\_advance instruction takes a single operand (encoded
+The \livetarg{chap:DWCFAadvanceloc}{DW\-\_CFA\-\_advanceloc} instruction takes a single operand (encoded
with the opcode) that represents a constant delta. The required
action is to create a new table row with a location value that
is computed by taking the current entry’s location value
current row
\item \textbf{DW\-\_CFA\-\_advance\-\_loc1} \\
-The DW\-\_CFA\-\_advance\-\_loc1 instruction takes a single ubyte
+The \livetarg{chap:DWCFAadvanceloc1}{DW\-\_CFA\-\_advance\-\_loc1} instruction takes a single ubyte
operand that represents a constant delta. This instruction
-is identical to DW\-\_CFA\-\_advance\-\_loc except for the encoding
+is identical to \livetarg{chap:DWCFAadvanceloc}{DW\-\_CFA\-\_advance\-\_loc} except for the encoding
and size of the delta operand.
\item \textbf{DW\-\_CFA\-\_advance\-\_loc2} \\
-The DW\-\_CFA\-\_advance\-\_loc2 instruction takes a single uhalf
+The \livetarg{chap:DWCFAadvanceloc2}{DW\-\_CFA\-\_advance\-\_loc2} instruction takes a single uhalf
operand that represents a constant delta. This instruction
-is identical to DW\-\_CFA\-\_advance\-\_loc except for the encoding
+is identical to \livelink{chap:DWCFAadvanceloc}{DW\-\_CFA\-\_advance\-\_loc} except for the encoding
and size of the delta operand.
\item \textbf{DW\-\_CFA\-\_advance\-\_loc4} \\
-The DW\-\_CFA\-\_advance\-\_loc4 instruction takes a single uword
+The \livetarg{chap:DWCFAadvanceloc4}{DW\-\_CFA\-\_advance\-\_loc4} instruction takes a single uword
operand that represents a constant delta. This instruction
-is identical to DW\-\_CFA\-\_advance\-\_loc except for the encoding
+is identical to \livelink{chap:DWCFAadvanceloc}{DW\-\_CFA\-\_advance\-\_loc} except for the encoding
and size of the delta operand.
\end{enumerate}
\begin{enumerate}[1.]
\item \textbf{DW\-\_CFA\-\_def\-\_cfa} \\
-The DW\-\_CFA\-\_def\-\_cfa instruction takes two unsigned LEB128
+The \livetarg{chap:DWCFAdefcfa}{DW\-\_CFA\-\_def\-\_cfa} instruction takes two unsigned LEB128
operands representing a register number and a (non\dash factored)
offset. The required action is to define the current CFA rule
to use the provided register and offset.
\item \textbf{ DW\-\_CFA\-\_def\-\_cfa\-\_sf} \\
-The DW\-\_CFA\-\_def\-\_cfa\-\_sf instruction takes two operands:
+The \livetarg{chap:DWCFAdefcfasf}{DW\-\_CFA\-\_def\-\_cfa\-\_sf} instruction takes two operands:
an unsigned LEB128 value representing a register number and a
signed LEB128 factored offset. This instruction is identical
-to DW\-\_CFA\-\_def\-\_cfa except that the second operand is signed
+to \livelink{chap:DWCFAdefcfa}{DW\-\_CFA\-\_def\-\_cfa} except that the second operand is signed
and factored. The resulting offset is factored\_offset *
data\_alignment\_factor.
\item \textbf{DW\-\_CFA\-\_def\-\_cfa\-\_register} \\
-The DW\-\_CFA\-\_def\-\_cfa\-\_register instruction takes a single
+The \livetarg{chap:DWCFAdefcfaregister}{DW\-\_CFA\-\_def\-\_cfa\-\_register} instruction takes a single
unsigned LEB128 operand representing a register number. The
required action is to define the current CFA rule to use
the provided register (but to keep the old offset). This
\item \textbf{DW\-\_CFA\-\_def\-\_cfa\-\_offset} \\
-The DW\-\_CFA\-\_def\-\_cfa\-\_offset instruction takes a single
+The \livetarg{chap:DWCFAdefcfaoffset}{DW\-\_CFA\-\_def\-\_cfa\-\_offset} instruction takes a single
unsigned LEB128 operand representing a (non-factored)
offset. The required action is to define the current CFA rule
to use the provided offset (but to keep the old register). This
\item \textbf{DW\-\_CFA\-\_def\-\_cfa\-\_offset\-\_sf} \\
-The DW\-\_CFA\-\_def\-\_cfa\-\_offset\-\_sf instruction takes a signed
+The \livetarg{chap:DWCFAdefcfaoffsetsf}{DW\-\_CFA\-\_def\-\_cfa\-\_offset\-\_sf} instruction takes a signed
LEB128 operand representing a factored offset. This instruction
-is identical to DW\-\_CFA\-\_def\-\_cfa\-\_offset except that the
+is identical to \livelink{chap:DWCFAdefcfaoffset}{DW\-\_CFA\-\_def\-\_cfa\-\_offset} except that the
operand is signed and factored. The resulting offset is
factored\_offset * data\_alignment\_factor. This operation
is valid only if the current CFA rule is defined to use a
register and offset.
\item \textbf{DW\-\_CFA\-\_def\-\_cfa\-\_expression} \\
-The DW\-\_CFA\-\_def\-\_cfa\-\_expression instruction takes a single
+The \livetarg{chap:DWCFAdefcfaexpression}{DW\-\_CFA\-\_def\-\_cfa\-\_expression} instruction takes a single
operand encoded as a \livelink{chap:DWFORMexprloc}{DW\-\_FORM\-\_exprloc} value representing a
DWARF expression. The required action is to establish that
expression as the means by which the current CFA is computed.
\begin{enumerate}[1.]
\item \textbf{DW\-\_CFA\-\_undefined} \\
-The DW\-\_CFA\-\_undefined instruction takes a single unsigned
+The \livetarg{chap:DWCFAundefined}{DW\-\_CFA\-\_undefined} instruction takes a single unsigned
LEB128 operand that represents a register number. The required
action is to set the rule for the specified register to
``undefined.''
\item \textbf{DW\-\_CFA\-\_same\-\_value} \\
-The DW\-\_CFA\-\_same\-\_value instruction takes a single unsigned
+The \livetarg{chap:DWCFAsamevalue}{DW\-\_CFA\-\_same\-\_value} instruction takes a single unsigned
LEB128 operand that represents a register number. The required
action is to set the rule for the specified register to
``same value.''
\item \textbf{DW\-\_CFA\-\_offset} \\
-The DW\-\_CFA\-\_offset instruction takes two operands: a register
+The \livetarg{chap:DWCFAoffset}{DW\-\_CFA\-\_offset} instruction takes two operands: a register
number (encoded with the opcode) and an unsigned LEB128
constant representing a factored offset. The required action
is to change the rule for the register indicated by the
\textit{factored offset * data\_alignment\_factor.}
\item \textbf{DW\-\_CFA\-\_offset\-\_extended} \\
-The DW\-\_CFA\-\_offset\-\_extended instruction takes two unsigned
+The \livetarg{chap:DWCFAoffsetextended}{DW\-\_CFA\-\_offset\-\_extended} instruction takes two unsigned
LEB128 operands representing a register number and a factored
-offset. This instruction is identical to DW\-\_CFA\-\_offset except
+offset. This instruction is identical to \livelink{chap:DWCFAoffset}{DW\-\_CFA\-\_offset} except
for the encoding and size of the register operand.
\item \textbf{ DW\-\_CFA\-\_offset\-\_extended\-\_sf} \\
-The DW\-\_CFA\-\_offset\-\_extended\-\_sf instruction takes two operands:
+The \livetarg{chap:DWCFAoffsetextendedsf}{DW\-\_CFA\-\_offset\-\_extended\-\_sf} instruction takes two operands:
an unsigned LEB128 value representing a register number and a
signed LEB128 factored offset. This instruction is identical
-to DW\-\_CFA\-\_offset\-\_extended except that the second operand is
+to \livelink{chap:DWCFAoffsetextended}{DW\-\_CFA\-\_offset\-\_extended} except that the second operand is
signed and factored. The resulting offset is
\textit{factored\_offset * data\_alignment\_factor}.
\item \textbf{DW\-\_CFA\-\_val\-\_offset} \\
-The DW\-\_CFA\-\_val\-\_offset instruction takes two unsigned
+The \livetarg{chap:DWCFAvaloffset}{DW\-\_CFA\-\_val\-\_offset} instruction takes two unsigned
LEB128 operands representing a register number and a
factored offset. The required action is to change the rule
for the register indicated by the register number to be a
\textit{factored\_offset * data\_alignment\_factor}.
\item \textbf{DW\-\_CFA\-\_val\-\_offset\-\_sf} \\
-The DW\-\_CFA\-\_val\-\_offset\-\_sf instruction takes two operands: an
+The \livetarg{chap:DWCFAvaloffsetsf}{DW\-\_CFA\-\_val\-\_offset\-\_sf} instruction takes two operands: an
unsigned LEB128 value representing a register number and a
signed LEB128 factored offset. This instruction is identical
-to DW\-\_CFA\-\_val\-\_offset except that the second operand is signed
+to \livelink{chap:DWCFAvaloffset}{DW\-\_CFA\-\_val\-\_offset} except that the second operand is signed
and factored. The resulting offset is
\textit{factored\_offset * data\_alignment\_factor}.
\item \textbf{DW\-\_CFA\-\_register} \\
-The DW\-\_CFA\-\_register instruction takes two unsigned LEB128
+The \livetarg{chap:DWCFAregister}{DW\-\_CFA\-\_register} instruction takes two unsigned LEB128
operands representing register numbers. The required action
is to set the rule for the first register to be register(R)
where R is the second register.
\item \textbf{DW\-\_CFA\-\_expression} \\
-The DW\-\_CFA\-\_expression instruction takes two operands: an
+The \livetarg{chap:DWCFAexpression}{DW\-\_CFA\-\_expression}
+instruction takes two operands: an
unsigned LEB128 value representing a register number, and
-a \livelink{chap:DWFORMblock}{DW\-\_FORM\-\_block} value representing a DWARF expression. The
+a \livelink{chap:DWFORMblock}{DW\-\_FORM\-\_block}
+value representing a DWARF expression.
+The
required action is to change the rule for the register
indicated by the register number to be an expression(E)
rule where E is the DWARF expression. That is, the DWARF
expression operators that can be used.
\item \textbf{DW\-\_CFA\-\_val\-\_expression} \\
-The DW\-\_CFA\-\_val\-\_expression instruction takes two operands:
+The \livetarg{chap:DWCFAvalexpression}{DW\-\_CFA\-\_val\-\_expression} instruction takes two operands:
an unsigned LEB128 value representing a register number, and
-a \livelink{chap:DWFORMblock}{DW\-\_FORM\-\_block} value representing a DWARF expression. The
+a \livelink{chap:DWFORMblock}{DW\-\_FORM\-\_block}
+value representing a DWARF expression. The
required action is to change the rule for the register
indicated by the register number to be a val\_expression(E)
rule where E is the DWARF expression. That is, the DWARF
expression operators that can be used.
\item \textbf{ DW\-\_CFA\-\_restore} \\
-The DW\-\_CFA\-\_restore instruction takes a single operand (encoded
+The \livetarg{chap:DWCFArestore}{DW\-\_CFA\-\_restore} instruction takes a single operand (encoded
with the opcode) that represents a register number. The
required action is to change the rule for the indicated
register to the rule assigned it by the initial\_instructions
in the CIE.
\item \textbf{DW\-\_CFA\-\_restore\-\_extended} \\
-The DW\-\_CFA\-\_restore\-\_extended instruction takes a single unsigned
+The \livetarg{chap:DWCFArestoreextended}{DW\-\_CFA\-\_restore\-\_extended} instruction takes a single unsigned
LEB128 operand that represents a register number. This
-instruction is identical to DW\-\_CFA\-\_restore except for the
+instruction is identical to \livelink{chap:DWCFArestore}{DW\-\_CFA\-\_restore} except for the
encoding and size of the register operand.
\end{enumerate}
\begin{enumerate}[1.]
\item \textbf{DW\-\_CFA\-\_remember\-\_state} \\
-The DW\-\_CFA\-\_remember\-\_state instruction takes no operands. The
+The \livetarg{chap:DWCFArememberstate}{DW\-\_CFA\-\_remember\-\_state} instruction takes no operands. The
required action is to push the set of rules for every register
onto an implicit stack.
\item \textbf{DW\-\_CFA\-\_restore\-\_state} \\
-The DW\-\_CFA\-\_restore\-\_state instruction takes no operands. The
+The \livetarg{chap:DWCFArestorestate}{DW\-\_CFA\-\_restore\-\_state} instruction takes no operands. The
required action is to pop the set of rules off the implicit
stack and place them in the current row.
\label{chap:paddinginstruction}
\begin{enumerate}[1.]
\item \textbf{DW\-\_CFA\-\_nop} \\
-The DW\-\_CFA\-\_nop instruction has no operands and no required
+The \livetarg{chap:DWCFAnop}{DW\-\_CFA\-\_nop} instruction has no operands and no required
actions. It is used as padding to make a CIE or FDE an
appropriate size
initial\_instructions field of the associated CIE.}
\item \textit{Read and process the FDE’s instruction
-sequence until a DW\-\_CFA\-\_advance\-\_loc, DW\-\_CFA\-\_set\-\_loc, or the
+sequence until a \livelink{chap:DWCFAadvanceloc}{DW\-\_CFA\-\_advance\-\_loc},
+\livelink{chap:DWCFAsetloc}{DW\-\_CFA\-\_set\-\_loc}, or the
end of the instruction stream is encountered.}
-\item \textit{ If a DW\-\_CFA\-\_advance\-\_loc or DW\-\_CFA\-\_set\-\_loc
+\item \textit{ If a \livelink{chap:DWCFAadvanceloc}{DW\-\_CFA\-\_advance\-\_loc} or \livelink{chap:DWCFAsetloc}{DW\-\_CFA\-\_set\-\_loc}
instruction is encountered, then compute a new location value
(L2). If L1 >= L2 then process the instruction and go back
to step 2.}
\item \textit{ The end of the instruction stream can be thought
-of as a DW\-\_CFA\-\_set\-\_loc (initial\_location + address\_range)
+of as a \livelink{chap:DWCFAsetloc}{DW\-\_CFA\-\_set\-\_loc} (initial\_location + address\_range)
instruction. Note that the FDE is ill-formed if L2 is less
than L1.}
If a Return Address register is defined in the virtual
unwind table, and its rule is undefined (for example, by
-DW\-\_CFA\-\_undefined), then there is no return address and no
+\livelink{chap:DWCFAundefined}{DW\-\_CFA\-\_undefined}), then there is no return address and no
call address, and the virtual unwind of stack activations
is complete.